In general, in a manufacturing process of a semiconductor integrated circuit, various single-substrate processes such as a film forming process, an etching process, a heat treatment process, a modification process and a crystallization process are repeated on a target object such as a semiconductor wafer to form the desired integrated circuit.
With the recent trend of thin-film integrated circuits featuring a high operation speed and high integration, the line width and film thickness of the integrated circuit become smaller. For example, in case of a semiconductor device of a semiconductor integrated circuit, e.g. a transistor, it is required to further reduce the width of the gate insulating film as well as to further decrease the thickness of a gate insulating film of the transistor to meet the miniaturization requirement. To be specific, it is necessary to set the thickness of the gate insulating film to 1 to 2 nm or smaller. However, in such an extremely thin gate insulating film, a tunneling current is increased, which in turn increases a gate leakage current.
For this, a high-k dielectric thin film having a much higher dielectric constant than SiO2 tends to be used as the gate insulating film instead of a SiO2 film (for example, see Japanese Patent Laid-open Publication Nos. 2002-100627 and H20-135233). The high dielectric thin film may be formed of refractory metal oxide such as HfO2, HfSiO2, ZrO2, ZrSiO2 or the like.
In case of a gate insulating film formed by coating a high-k dielectric thin film directly on a silicon substrate or film, metal elements in the high-k dielectric film tend to diffuse into the silicon substrate or film to thereby cause a carrier scattering problem in a channel region. In order to prevent diffusion of the metal elements, a thin SiO2 film with a thickness of, e.g., several Å (1Å=10−10 m) is formed under the high-k dielectric thin film as a base film. The SiO2 film serving as the base film is much thinner than a SiO2 film serving as a gate insulating film having a thickness of, e.g., 1 to 2 nm. An exemplary transistor as a semiconductor device of such a gate structure will be described with reference to FIG. 15. FIG. 15 is a schematic view of an exemplary transistor having a high-k dielectric thin film serving as a gate insulating film.
In FIG. 15, a source S and a drain D are formed at the surface of a semiconductor wafer W made of a silicon substrate; and a base film 2 made of a SiO2 film, a high-k dielectric thin film 4, a nitride film 6 and a gate electrode 8 are formed on the surface of the semiconductor wafer W between the source S and the drain D in that order from the bottom side. The base film 2 is formed by oxidizing the silicon surface of the semiconductor wafer W. The high-k dielectric thin film 4 is formed by thermal CVD (Chemical Vapor Deposition) by using metal organic compound materials including refractory metal such as Hf.
The nitride film 6 is formed by nitriding the surface of the high-k dielectric thin film 4 and it prevents metal in the gate electrode 8 from diffusing into the high-k dielectric thin film 4. A polysilicon film with implanted impurities, a metal film such as a tungsten film or a tantalum film or a nitride film thereof may be used for the gate electrode 8.
On the other hand, since metal organic compound materials are used in forming the high-k dielectric thin film 4 as described above, the high-k dielectric film 4 inevitably includes some carbon (C) components. Therefore, the included carbon components reduce a dielectric constant to cause a leakage current and further make a critical value of the transistor unstable. For this, the high-k dielectric thin film 4 after formed is heated to 800 to 1000° C. to perform annealing thereon so that the included carbon components can be removed as much as possible.
However, since removal of the carbon components by high temperature annealing reduces the film density, the dielectric constant is reduced, which deteriorates film quality and cannot provide desired electrical characteristics.
As methods to compensate for the carbon deficiency of the high-k dielectric thin film, there have been suggested a method for exposing a high-k dielectric thin film to plasma-excited oxygen radicals and a method for applying ultraviolet rays to a high-k dielectric thin film in an ozone atmosphere, i.e. UV-O3 processing (see, e.g., Japanese Patent Laid-open Publication No. H9-121035).
However, in the method for exposing a high-k dielectric thin film to plasma-excited oxygen radicals, uncontrolled excessive radicals are formed and they pass through the high-k dielectric thin film to increase the thickness of the SiO2 film serving as a base film, resulting in an increase of the Equivalent Oxide Thickness (EOT) of the gate insulating film. The EOT refers to a value obtained by converting a thickness of a gate insulating film into a thickness of a SiO film, the gate insulating film being formed by laminating a high-k dielectric thin film on a SiO2 film serving as a base film.
Further, since the UV-O3 processing method described above uses ozone which is a strong oxidizing agent, the thickness of the SiO2 film serving as a base film increases at the same time as the oxygen deficiency is compensated for, which results in an increase in the EOT of the gate insulating film.